Manuel d'utilisation / d'entretien du produit UG154 du fabricant Xilinx
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R LogiCORE™ IP SPI-4.2 Core v8.5 Getting Star ted Guide UG154 Mar ch 24, 2008.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com UG154 March 24, 2008 "Xilinx" and the Xilinx logo sho wn abov e are registered trademar ks of Xilinx, Inc.
w ww .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Revision History The following table shows the revision history for this document. Date V ersion Revision 09/30/04 1.0 Initial Xilinx release. 1 1/1 1/04 1.1 Document u pdated to support SPI-4.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com UG154 March 24, 2008.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com UG154 March 24, 2008 Schedule of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Schedule of Tables . . . . . . . . . . .
w ww .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 R <project directory>/<component name> . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 <component name>/doc . . . . . . . . . . . . .
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com UG154 March 24, 2008 Chapter 3: Quick Start Example Design Figure 3-1: Core Customization GUI Main Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Chapter 4: Detailed Example Design Figure 4-1: Example Design Confi guration .
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SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com UG154 March 24, 2008 Chapter 4: Detailed Example Design Table 4-1: Project Di rectory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 4-2: Component Name Directory .
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SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 11 UG154 March 24, 2008 R Pr eface About This Guide This guide provides information about generating the Xilinx LogiCORE™ IP SPI-4 .2 cor e, customizing and simulating the core using th e provided example design, and running the design files through implementation using the Xilinx tools.
12 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Preface: About This Guide R T ypogr aphical The following typographical conventions are used in this document: Online Documen.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 13 UG154 March 24, 2008 R Chapter 1 Intr oduction The LogiCORE IP SPI-4.2 (PL4) co re is a fully verifi ed design solution that supports V erilog and VHDL. The example design in this guide is provided in both V erilog and VHDL.
14 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 1: Introd uction R Contact your local Xilinx re presentative for a closer r eview and estimate of the effort requir ed to meet your specific des ign requir ements. Additional Core Resour ces For detailed information and updates about th e SPI-4.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 15 UG154 March 24, 2008 R Chapter 2 Licensing the Cor e This chapter provides instructions for obtaining a license for the core so that you can use the core in a design. The SPI-4.2 cor e is provided under the terms of the Xilinx LogiCORE Site License Agr eement .
16 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 2: Licensing the Core R be tested in the tar get device for a limited time before timing out . The core can be reactivated by re configuring the device after a t ime out.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 17 UG154 March 24, 2008 Installing Y our License File R Follow the instructions in the lounge to fill out the license r equest form; then click Submit to automatically generate the li cense. An email containing the license and installation instructions will be se nt to you immediately .
18 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 2: Licensing the Core R.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 19 UG154 March 24, 2008 R Chapter 3 Quick Start Example Design The quick start steps pr ovide information to quickly gener ate a SPI-4.2 core, r un the design through implementation with the Xilinx tools, and simulate the example design using the provided demonstration test bench.
20 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 3: Quick Star t Example Design R 5. After creating the project, locate the di r ectory containing the SPI-4.2 core in the taxonomy tree; it appears under Communications & Networking > T elecommunications > SPI-4.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 21 UG154 March 24, 2008 Implementing th e Example Design R Implementing the Example Design A f t e r g e n e r a t i n g a c o r e w i t h a F u l l.
22 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 3: Quick Star t Example Design R T o run a VHDL or V erilog functional simulation of the example design using NCSIM: 1. Set the current dir ectory to: <quickstart> /simulation/functional/ 2.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 23 UG154 March 24, 2008 Running the Sim ulation R The simulation script compiles the timing simulation model and the demonstration test bench, adds re levant signals to the wave window , and runs the simulation.
24 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 3: Quick Star t Example Design R.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 25 UG154 March 24, 2008 R Chapter 4 Detailed Example Design This chapter provides detailed information about the example design, including a descrip.
26 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R Directory and File Contents The SPI-4.2 core dir e ctories and their assoc iated files are defined in the following sections. <project director y> The project dir ectory contains all the CORE Generator project files.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 27 UG154 March 24, 2008 Directory and File Contents R <component name>/e xample design The example design dir ectory contains the ex ample design files pr ovided with the cor e. spi4_2_ug153.pdf SPI-4.
28 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R <component name>/implement The implement directory contains the cor e implementation script files. T able 4-5: Implement Directory Name Description <project_dir>/<component_name>/implement implement.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 29 UG154 March 24, 2008 Directory and File Contents R implement/results The results dir ectory is created by the implem ent script, after which the implement script resul ts are placed in the r esults dir ectory .
30 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R simulation/functional The functional directory contains functional simulation scripts pr ovided with the core.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 31 UG154 March 24, 2008 Implementation and Sim ulation Scripts R simulation/timing The timing directory contains timing simulation scripts provided with the core.
32 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R If the core was generated with the Full System Har dware Evaluation or the Full license, the implementation script is pr esent and performs the following steps: 1.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 33 UG154 March 24, 2008 Example Design Configurat ion R connects to a SPI-4.2 PHY layer device or network processor . Figure 4-1 shows the example design modules architectur e and interfaces to the SPI-4.
34 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R Demonstration T est Bench The demonstration test bench emulates a PHY device by generating and receiving packet data across the SPI-4.2 interface.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 35 UG154 March 24, 2008 Demonstratio n T est Bench R • Status Monitor • Te s t c a s e Cloc k Generator The Clock Generator cr eates all of the clocks that are used in the Design Example, including SysClk , RDClk2x , UserClk , TSClk , and SnkIdelayRefClk .
36 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R Star tup Module The Startup Module contains th ree functions: DCM setup, calendar loading, an d Dynamic Phase Alignment (DP A) Initialization.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 37 UG154 March 24, 2008 Demonstratio n T est Bench R • RDCLK_RST Holds DCMReset_RDClk for 8 cycles then r eleases it • RDCLK_LCK Wa i t s f o r t h e Locked_RDClk signal. • TSCLK_RST Holds DCMReset_TSClk for 12 cycles then r eleases it.
38 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R Procedures Module The procedur es module is a package of functions instantiated in the testcase module to simplify sending d ata and status to the stimulus module.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 39 UG154 March 24, 2008 Demonstratio n T est Bench R Lastly , the signal SnkInFrame is cr eated in the status monitor by inverting Snk Oof . This signal is used by the stimulus module to send traini ng.
40 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R MERGE_P A YLOAD Integer 0 <0 or 1> Before da ta is sent on RDat, the demonstration test bench can either mer ge an EOP and SOP control wor d into one payload control word, or i t can leave them as two separate contr ol words.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 41 UG154 March 24, 2008 Demonstratio n T est Bench R T estcase Module The testcase module generates data and sends it to the stimulu s module, which in turn transmits data to the Sink core and status to the Source core.
42 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R Ta b l e 4 - 1 1 contains a list of common useful test case signals and descriptions. There ar e five request signals that can be asse rted in the testcase module.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 43 UG154 March 24, 2008 Demonstratio n T est Bench R and the status for that channel. This sends the status and the channel to the stimulus module for transmission to the core. The stimulus mo d u le e n su r es t h at t h e st a t us i s se n t in the correct location of the calendar sequence.
44 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Chapter 4: Detailed Exa mple Design R.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 45 UG154 March 24, 2008 R Appendix A VHDL Details Pr ocedures Module The procedur es module is a package of functions instantiated in the testcase module to simplify the sending of data and status to th e Stimulus module.
46 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Appendix A: VHDL Details R automatically calcul ated from the number of bytes sent. ERR has a higher priority than EOP; if EOP and ERR ar e both ‘1’, the EO Ps for the burst is an EOP abort = ‘01’.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 47 UG154 March 24, 2008 Proce dures Module R The send_status pr ocedure is used to change the status for a particular channel. The get_status pr ocedure is called to check s tatus of a specific channe l.
48 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Appendix A: VHDL Details R.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 49 UG154 March 24, 2008 R Appendix B V erilog Details Pr ocedures Module The procedur es module is a package of functi ons ins tantiated in the T estcase module to simplify sending data and status to the Stimul us module.
50 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Appendix B: V e r ilog Details R The send_user_data pr ocedure is used to transmit a burst of data. The presence of a SOP contr ol word (befor e the burst of data) and an EOP contr ol word (following the data burst), can be specified.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 51 UG154 March 24, 2008 Random T estcase Sample Code R The send_status pr ocedure is used to change the status for a particular channel. The get_status procedure is called to check status of a specific channel.
52 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Appendix B: V e r ilog Details R RandIdleRequest = {$random(` RANDOM_SEED + $random(`RANDOM_SEED + $time))} % 100; RandTraini.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 53 UG154 March 24, 2008 Random T estcase Sample Code R begin if (DIP4RequestCnt > 0) begin DIP4RequestCnt <= DIP4Reques tCnt - 1'b1; TCDI.
54 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Appendix B: V e r ilog Details R begin TCSnkDip2ErrRequest <= 1'b1; SnkDip2ErrRequestCnt <= {$ra ndom(`RANDOM_SEED + $time)} % 9; end end //Sends a random sized packe t to a random channel if (RandTask == 0) begin tasks.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 55 UG154 March 24, 2008 R Appendix C Data and Status Monitor W arnings The Data and Status monitors continuously check data sent to and r eceived fr om the demonstration test bench. Ther e are several common warnings that occur when the T estcase module is modified.
56 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Appendix C: Dat a and Status Monitor W arnings R.
SPI-4.2 v8.5 Getti ng Started Guide www .xilinx.com 57 UG154 March 24, 2008 R Appendix D T iming Simulation W arning and Err or Messages There ar e several common simulation warnings and err or messages when timing simulation is run on the example design.
58 www .xilinx.com SPI-4.2 v8.5 Getting Started Guide UG154 March 24, 2008 Appendix D: Timing Simulation W arning and Error Mess ages R.
Un point important après l'achat de l'appareil (ou même avant l'achat) est de lire le manuel d'utilisation. Nous devons le faire pour quelques raisons simples:
Si vous n'avez pas encore acheté Xilinx UG154 c'est un bon moment pour vous familiariser avec les données de base sur le produit. Consulter d'abord les pages initiales du manuel d'utilisation, que vous trouverez ci-dessus. Vous devriez y trouver les données techniques les plus importants du Xilinx UG154 - de cette manière, vous pouvez vérifier si l'équipement répond à vos besoins. Explorant les pages suivantes du manuel d'utilisation Xilinx UG154, vous apprendrez toutes les caractéristiques du produit et des informations sur son fonctionnement. Les informations sur le Xilinx UG154 va certainement vous aider à prendre une décision concernant l'achat.
Dans une situation où vous avez déjà le Xilinx UG154, mais vous avez pas encore lu le manuel d'utilisation, vous devez le faire pour les raisons décrites ci-dessus,. Vous saurez alors si vous avez correctement utilisé les fonctions disponibles, et si vous avez commis des erreurs qui peuvent réduire la durée de vie du Xilinx UG154.
Cependant, l'un des rôles les plus importants pour l'utilisateur joués par les manuels d'utilisateur est d'aider à résoudre les problèmes concernant le Xilinx UG154. Presque toujours, vous y trouverez Troubleshooting, soit les pannes et les défaillances les plus fréquentes de l'apparei Xilinx UG154 ainsi que les instructions sur la façon de les résoudre. Même si vous ne parvenez pas à résoudre le problème, le manuel d‘utilisation va vous montrer le chemin d'une nouvelle procédure – le contact avec le centre de service à la clientèle ou le service le plus proche.
