Manuel d'utilisation / d'entretien du produit SP605 du fabricant Xilinx
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[Guide Subtitle] [optional] UG526 (v1.1.1 ) February 1, 2010 [ optional] SP605 Har d ware User Guide UG526 (v1.1.1 ) February 1, 2010.
SP605 Hard ware User Guide www .xilinx.com UG526 (v1.1.1) Februar y 1, 2010 Xilinx is disclosing this user gui de, manual, rel ease note, and/or sp ecification (the "Documentation") to y ou solely f or use in the dev elopment of designs to operate with Xilinx hardw are de vices.
SP605 Hard ware User Guide www .xilinx.com 3 UG526 (v1.1.1) F ebrua ry 1, 2010 Preface: About This Guide Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Additional Documentation .
4 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 System ACE CF CompactFla sh Image Select DIP Switch S1 (Ac tive-High) . . . . . . . . . . 48 Mode DIP Switch SW1 (Acti ve-High) . . . . . . . . . . . . . . . . . . . . . . .
SP605 Hard ware User Guide www .xilinx.com 5 UG526 (v1.1.1) F ebrua ry 1, 2010 Pr eface About This Guide This manual accompan ies the Spar tan®-6 FP GA SP605 Evaluation Board and contains information about the SP605 hardwar e and software tools.
6 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Pref ace: About This Guide This guide describes the clocking r esources available in all Spartan-6 devices, including the DCMs and PLLs. • Spartan-6 FPGA Block RAM Res ourc es User Guide This guide describes the Spa rtan-6 device block RAM capa bilities.
SP605 Hard ware User Guide www .xilinx.com 7 UG526 (v1.1.1) F ebrua ry 1, 2010 Chapter 1 SP605 Evaluation Board Overview The SP605 board enables har dware and software developers to cr eate or evaluate designs targeting the Spartan®-6 XC6SLX45T -3FGG484 FPGA.
8 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board F eatures The SP605 board pr ovides the following features: • 1. Spartan-6 XC6SLX45T -3FGG48 4 FPGA • 2. 128 MB DDR3 Component Memory • 3.
SP605 Hard ware User Guide www .xilinx.com 9 UG526 (v1.1.1) F ebrua ry 1, 2010 Overvie w • 17. Switches ♦ Power On/Of f slide switch ♦ System ACE CF Reset pushbutton ♦ System ACE CF bitstream image select DIP switch ♦ Mode DIP switch • 18.
10 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board Related Xilinx Documents Prior to using the SP605 Evaluation Board, user s sh ou ld b e fa mil iar wit h Xi li nx res ource s. See the following locations for additional documentation on Xilinx tools and solutions: • ISE: www .
SP605 Hard ware User Guide www .xilinx.com 11 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription 4 Linear BPI Flash x16 Numonyx JS28F256P30T95 19 5 SystemACE CompactFlash Socket XCCACE-TQ144I Controller 20 6 USB JT AG Conn. (USB Mini-B) USB JT AG Download Circ uit 32 7 Clock Generation 200 MHz OSC, oscillator socket, SMA connectors 13, 14 a.
12 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 1. Spar tan-6 XC6SLX45T - 3 FGG4 8 4 FPGA A Xilinx Spartan-6 XC6SLX45T -3FGG484 FPGA is installed on the E mbedded Development Board . Ref erences See the Spartan-6 FPGA Dat a Sheet.
SP605 Hard ware User Guide www .xilinx.com 13 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription I/O V oltage Rails There ar e four available banks on the XC6S LX45T -3FGG484 device. Banks 0, 1, and 2 are connected for 2.5V I/O. Bank 3 is used for the 1.
14 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board Ta b l e 1 - 5 shows the connections and pin numbers for the DDR3 Component Memory .
SP605 Hard ware User Guide www .xilinx.com 15 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription Ref erences See the Micron T e chnology , Inc. DDR3 SDRAM Specificat ion for mor e information. [Ref 12] Also, see the Sparta n-6 FPGA Memory Contr oller User Guide .
16 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 3 . SPI x4 Flash The Xilinx Spartan-6 FPGA hosts a SPI interfa ce which is visible to the Xilinx iMP ACT configuration tool. The SPI memory device oper ates at 3.
SP605 Hard ware User Guide www .xilinx.com 17 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription Ref erences See the W inbond Serial Flash Memory Data Sheet for more information. [Ref 13] See the XPS Serial Peripheral Interface Data Sheet for more information.
18 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 4. Linear BPI Flash A Numonyx JS28F256P30 Linear Flas h memory (U25) on the SP605 ( Figur e 1-5 ) pr ovides 32 MB of non-volatile storage that can be us ed for configuration as well as softwar e storage.
SP605 Hard ware User Guide www .xilinx.com 19 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription E22 FLASH_A16 55 A17 E20 FLASH_A17 18 A18 F22 F LASH_A18 17 A19 F21 F LASH_A19 16 A20 H19 FLASH_A2.
20 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board FPGA Design Considerations f or the Configuration Flash The SP605 has the P30 BPI flash connected to th e FPGA dual use configuration pins and is not shared.
SP605 Hard ware User Guide www .xilinx.com 21 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription System ACE CF error and status LEDs indicate the operational state of the System ACE CF controller.
22 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board Ref erences See the System ACE CF pr oduct page for mor e information at http://www .xilinx.com/support/docum entation/sys tem_ace_solutions.
SP605 Hard ware User Guide www .xilinx.com 23 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription FMC bypass jumper J19 must be connected be tween pins 1-2 (bypass) to enable JT AG access to the FPGA on the basic SP605 boar d (w ithout FMC expansion modules installed), as shown in Figure 1-7 .
24 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board Oscillator Sock et (Single-Ended, 2.5V or 3 . 3 V) One populated single-ended clock socket (X2) is provided for user applications. The option of 2.
SP605 Hard ware User Guide www .xilinx.com 25 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription SMA Connectors (Diff erential) A high-pr ecision clock sign al can be pr ovided to the FPGA using dif fer ential clock signals through the onboar d 50-ohm SMA connectors J38 (N) and J4 1 (P).
26 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board X-Ref Target - Figure 1-10 Figure 1-10: GTP SMA Clock GND1 GND2 GND3 GND4 GND5 GND6 GN.
SP605 Hard ware User Guide www .xilinx.com 27 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription T able 1- 10: GTP SMA Clock Connections U1 FPGA Pin Schematic Net Name SMA Pin C9 SMA_RX_N J3 5.1 D9 SMA_RX_P J34.1 A8 SMA_TX_N J33.1 B8 SMA_TX_P J32.
28 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 9. PCI Express Endpoint Connectivity The 1-lane PCIe edge connector pe rforms data transfe rs at the rate of 2.5 GT/s for a Gen1 application.
SP605 Hard ware User Guide www .xilinx.com 29 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription Ref erences See the Spartan-6 FPGA GTP T ransceivers User Guide for mor e information.
30 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 10. SFP Module Connector The board contains a small form-fact or plugga ble (SFP) co nnector and cage assembly that accepts SFP modules. The SFP interface is co nnected to MGT Bank 123 on the FPGA.
SP605 Hard ware User Guide www .xilinx.com 31 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription 11. 10/100/1000 T ri-Speed Ether net PHY The SP605 uses the onboar d Marvell Alaska P H Y d e v i c e ( 8 8 E 1111 ) f o r E t h e r n e t communications at 10, 100, or 1000 Mb/s.
32 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board Ref erences See the Marvell Alaska Gigabit Ethernet T ransceivers product page for more information. [Ref 17] Also, see the LogiCORE™ IP T ri-Mode Et hernet MAC User Guide .
SP605 Hard ware User Guide www .xilinx.com 33 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription 12. USB-to-U AR T Bridge The SP605 contains a Silicon Labs CP2103G M USB-to-UAR T bridge device (U4) which allows connection to a host computer with a US B cable.
34 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 1 3 . D VI CODEC A DVI connector (P3) is pre sent on the boar d to support an external video monitor . The DVI circuitry utilizes a Chr ontel CH7301C (U31) capable of 1600 X 1200 resolution with 24- bit color .
SP605 Hard ware User Guide www .xilinx.com 35 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription 14. IIC Bus The SP605 implements thr ee IIC bus interfaces at the FPGA.
36 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 8 -Kb NV Memor y The SP605 hosts a 8-Kb ST Microelectroni cs M24C08-WDW6TP IIC parameter storage memory device (U4) . The IIC addr ess of U4 is 0b1010 100 , and U4 is not write prote cted (WP pin 7 is tied to GND).
SP605 Hard ware User Guide www .xilinx.com 37 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription Ref erences See the ST Micro M24C08 Data Sheet for more information.
38 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 15. Status LEDs Ta b l e 1 - 2 1 defines the status LEDs.
SP605 Hard ware User Guide www .xilinx.com 39 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription Ether net PHY Status LEDs The Ethernet PHY status LEDs (DS1 1-DS13) are mounted in right-angle plastic housings to make them visible on the connector end of the board whe n the SP605 board is installed into a PC motherboard.
40 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board FPGA INIT and DONE LEDs The typical Xilinx FPGA power up and conf iguration status LEDs are pr esent on the SP605. The red INIT LED DS17 comes on momentarily after the FPGA powers up and during its internal power-on pr ocess.
SP605 Hard ware User Guide www .xilinx.com 41 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription 16. User I/O The SP605 provides the following user and general purpose I/O capabilities: • User .
42 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board User Pushb utton Switches The SP605 provides five active-High pushbutton switches: SW4, SW5, SW6, SW7 and SW8. The five pushbuttons all have the same topology as the sample shown in Figure 1- 16 .
SP605 Hard ware User Guide www .xilinx.com 43 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription User DIP Switch The SP605 includes an active-High fo ur-pole DIP switch, as described in Figur e 1- 17 and Ta b l e 1 - 2 5 . Three poles (switches 1-3) ar e pulled up to 2.
44 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board User SIP Header The SP605 includes a 6-pin sing le-inline (SIP) male pin header (J55) for FPGA GPIO access.
SP605 Hard ware User Guide www .xilinx.com 45 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription User SMA GPIO The SP605 inclu des an pair of SMA connectors for GPIO as described in Figure 1- 19 and Ta b l e 1 - 2 7 .
46 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 17. Switches The SP605 Evaluation board incl udes the follow ing switches: • Power O.
SP605 Hard ware User Guide www .xilinx.com 47 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription FPGA_PROG_B Pushb utton SW 3 (Act iv e-Lo w) The SW3 switch ( Figure 1-21 ) grounds the FPGA PROG_B pin when pr essed. This action clears the FPGA. See the Sparta n-6 FPGA data sheet for mor e information on clearing the contents of the FPGA.
48 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board System A CE CF CompactFlash Image Se lect DIP Switch S1 (Activ e-High) System ACE CF CompactF lash (CF) image select DIP switch S1, switches 1–3 ( Figure 1-23 ) select which CF resi dent bitstream image is downloaded to the FPGA.
SP605 Hard ware User Guide www .xilinx.com 49 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription Mode DIP Switch SW1 (Activ e-High) DIP switch SW1 sets the FPGA mode as shown in Figure 1- 24 and T able 1-30, pa ge 55 . Ref erences For more information, r efer to the Spartan-6 FPGA Configuration User Guide [Ref 2] .
50 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board 1 8 . VIT A 57.1 FMC LPC Connector The SP605 implements the Low Pin Count (LPC, J2) connector option of the VIT A 57.1.1 FMC specification.
SP605 Hard ware User Guide www .xilinx.com 51 UG526 (v1.1.1) F ebrua ry 1, 2010 Detailed Des cription Ta b l e 1 - 2 8 shows the VIT A 57.1 FMC LPC connections. The connector pinout is in Appendix B, “VIT A 57.1 FMC LPC Connector Pinout.” T able 1-28: VIT A 57.
52 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board P ower Mana gement A C Adapter and 12V Input P o wer J a c k/Switch The SP605 is powe red fr om a 12V sour ce that is connect ed throu gh a 6-pin (2X3) right angle Mini-Fit type connector J18.
SP605 Hard ware User Guide www .xilinx.com 53 UG526 (v1.1.1) F ebrua ry 1, 2010 P o wer Management Onboard P ow er Regulation Figure 1- 25 shows the SP605 onboar d power supply architecture. The SP605 uses T exas Instruments power contr ollers for primary core power control and monitoring.
54 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board V oltage and current monitoring and contr ol ar e available for selected power rails through T exas Instruments' Fusion Digital Power™ graphical u ser interface (GUI) .
SP605 Hard ware User Guide www .xilinx.com 55 UG526 (v1.1.1) F ebrua ry 1, 2010 Configuration Options Configuration Options The FPGA on the SP605 Evaluation Boar d can be configured by the following methods: • “3. SPI x4 Flash,” page 16 • “4.
56 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Chapter 1: SP605 Evaluation Board.
SP605 Hard ware User Guide www .xilinx.com 57 UG526 (v1.1.1) F ebrua ry 1, 2010 Appendix A Default Jumper and Switch Settings Ta b l e A - 1 shows the default switch settings and Ta b l e A - 2 , p a g e 5 8 shows the default jumper settings for the SP605.
58 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Appendix A: Default Jumper and Switch Settings Ta b l e A - 2 : Def ault Jumper Settin gs Jum pe r REFDES Function Defau.
SP605 Hard ware User Guide www .xilinx.com 59 UG526 (v1.1.1) F ebrua ry 1, 2010 Appendix B VIT A 57.1 FMC LPC Connector Pinout Figure B-1 shows the pinout of the FMC LPC co nnector .
60 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Appendix B: VIT A 57.1 FMC LPC Connector Pinout.
SP605 Hard ware User Guide www .xilinx.com 61 UG526 (v1.1.1) F ebrua ry 1, 2010 Appendix C SP605 Master UCF The UCF template is pr ovided for designs that tar get the SP605. Net names pr ovided in the constraints below corr elate with net names on the SP605 r ev .
62 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Appendix C: SP605 Mast er UCF NET "FLASH_WE_B" LOC = "R20"; ## 14 on U25 NET "FLASH_OE_B" .
SP605 Hard ware User Guide www .xilinx.com 63 UG526 (v1.1.1) F ebrua ry 1, 2010 NET "FPGA_CMP_CS_B" LOC = "V18"; ## 4 on J3 NET "FPGA_CMP_MOSI" LOC = "W18"; ## .
64 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Appendix C: SP605 Mast er UCF NET "MEM1_LDQS_N" LOC = "N1"; ## G3 on U42 NET "MEM1_LDQS_P".
SP605 Hard ware User Guide www .xilinx.com 65 UG526 (v1.1.1) F ebrua ry 1, 2010 ## NET "SYSCLK_N" LOC = "K22"; ## NET "SYSCLK_P" LOC = "K21"; ## ## NET "US.
66 www .xilinx.com SP6 05 Hard ware User Guide UG526 (v1.1.1) Februar y 1, 2010 Appendix C: SP605 Mast er UCF.
SP605 Hard ware User Guide www .xilinx.com 67 UG526 (v1.1.1) F ebrua ry 1, 2010 Appendix D Refer ences This appendix provides r eferences to docume ntation supporting Spartan-6 FPGAs, tools, and IP . For additional information, see www .xilinx. com/support/documentation/index.
Un point important après l'achat de l'appareil (ou même avant l'achat) est de lire le manuel d'utilisation. Nous devons le faire pour quelques raisons simples:
Si vous n'avez pas encore acheté Xilinx SP605 c'est un bon moment pour vous familiariser avec les données de base sur le produit. Consulter d'abord les pages initiales du manuel d'utilisation, que vous trouverez ci-dessus. Vous devriez y trouver les données techniques les plus importants du Xilinx SP605 - de cette manière, vous pouvez vérifier si l'équipement répond à vos besoins. Explorant les pages suivantes du manuel d'utilisation Xilinx SP605, vous apprendrez toutes les caractéristiques du produit et des informations sur son fonctionnement. Les informations sur le Xilinx SP605 va certainement vous aider à prendre une décision concernant l'achat.
Dans une situation où vous avez déjà le Xilinx SP605, mais vous avez pas encore lu le manuel d'utilisation, vous devez le faire pour les raisons décrites ci-dessus,. Vous saurez alors si vous avez correctement utilisé les fonctions disponibles, et si vous avez commis des erreurs qui peuvent réduire la durée de vie du Xilinx SP605.
Cependant, l'un des rôles les plus importants pour l'utilisateur joués par les manuels d'utilisateur est d'aider à résoudre les problèmes concernant le Xilinx SP605. Presque toujours, vous y trouverez Troubleshooting, soit les pannes et les défaillances les plus fréquentes de l'apparei Xilinx SP605 ainsi que les instructions sur la façon de les résoudre. Même si vous ne parvenez pas à résoudre le problème, le manuel d‘utilisation va vous montrer le chemin d'une nouvelle procédure – le contact avec le centre de service à la clientèle ou le service le plus proche.
