Manuel d'utilisation / d'entretien du produit Perform CY7C1511KV18 du fabricant Cypress Semiconductor
Aller à la page of 31
72-Mbit QDR™-II SRAM 4-W ord Burst Architecture CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1 709 • 408-943-2600 Document Number: 001-00435 Rev .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 2 of 31 Logic Block Diagra m (CY7C151 1KV18) Logic Block Diagram (CY7C1526KV18) 2M x 8 Array CLK A (20:0) Gen. K K Control Logic Address Register D [7:0] Read Add.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 3 of 31 Logic Block Diagram (CY7C1513KV18) Logic Block Diagram (CY7C1515KV18) CLK A (19:0) Gen. K K Control Logic Address Register D [17:0] Read Add. Decode Read Data Reg.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 4 of 31 Pin Configuration The pin configurations for CY7C151 1KV18, CY7C 1526KV18, CY7C1513KV18, and CY7C1515KV18 follow . [1] 165-Ball FBGA (13 x 15 x 1 .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 5 of 31 CY7C1513KV18 (4M x 18) 123456789 10 11 A CQ NC/144M A WPS BWS 1 K NC/288M RPS AA C Q B NC Q9 D9 .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 6 of 31 Pin Definitions Pin Name I/O Pi n Description D [x:0] Input- Synchronous Data Input Signals . Sampled on the rising edge of K and K clocks when valid write operations are active.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 7 of 31 CQ Echo Clock CQ Referenced with Respect to C . This is a free running clock and is synchronized to the input clock for output data (C) of the QDR-II.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 8 of 31 Functional Overview The CY7C151 1KV1 8, CY7C1526KV18, CY7C1513KV18, CY7C1515KV18 are synchronous pipelin ed Burst SRAMs with a read port and a write port.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 9 of 31 Single Clock Mode The CY7C151 1KV18 is used with a single clock that controls both the input and outpu t registers.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 10 of 31 Application Example Figure 1 shows four QDR-II used in an application. Figure 1. Application Example T ruth T able The truth table for CY7C151 1KV18, CY7C1526 KV18, CY7C1513KV18, and CY7C1515KV18 fo llows.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 1 1 of 31 Write Cycle Descriptions The write cycle description table for CY7C151 1 KV18 and CY7C1513KV18 follows .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 12 of 31 Write Cycle Descriptions The write cycle description tabl e for CY7C1515KV18 follows.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 13 of 31 IEEE 1 149.1 Serial Boundary Scan (JT AG) These SRAMs incorporate a serial boundary scan T est Access Port (T AP) in the FBGA package. This part is fully compliant with IEEE S tandard #1 149.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 14 of 31 IDCODE The IDCODE instruction loads a vendor-specific, 32-bi t code into the instruction re gister .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 15 of 31 T AP Controller S t ate Diag ram The state diagram for the T AP controller follows.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 16 of 31 T AP Controller Block Diagram T AP Elect rical Characteristics Over the Operating Range [12, 13, 14] Parameter Description T est Conditions Min Max Unit V OH1 Output HIGH V oltage I OH = − 2.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 17 of 31 T AP AC Switching Characteristics Over the Operating Range [15, 16] Parameter Description Min M.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 18 of 31 Identification R egi ster Definitions Instruction Field Va l u e De scription CY7C151 1KV18 CY7C1526KV18 CY7C1513KV18 C Y7C1515KV18 Revision Numb er (31:29) 000 000 000 000 V ersion number .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 19 of 31 Boundary Scan Order Bit # Bump ID Bit # Bump ID Bit # Bump ID Bit # Bum p ID 0 6R 28 10G 56 6A .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 20 of 31 Power Up Sequence in QDR-II SRAM QDR-II SRAMs must be powered up and initialized in a predefined manner to prevent unde fined operation s. Power Up Sequence ■ Apply power and drive DOFF either HIGH or LOW (All other inputs can be HIGH or LOW).
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 21 of 31 Maximum Ratings Exceeding maximum ratin gs may impair the useful life of the device. These user guidelines are not teste d. S torage T emperature .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 22 of 31 I DD [21] V DD Operating Supply V DD = Max, I OUT = 0 mA, f = f MAX = 1/t CYC 200 MHz (x8) 430 .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 23 of 31 Cap acit ance T ested ini tially and after any design or process change that may affect these parameters. Parameter Description T est Conditions Max Unit C IN Input Capacitance T A = 25 ° C, f = 1 MHz, V DD = 1.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 24 of 31 Switching Characteristics Over the Operating Range [22, 23] Cypress Parameter Consorti um Param.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 25 of 31 Output T imes t CO t CHQV C/C Clock Rise (or K/K in single clock mode) to Data V alid – 0.45 – 0.45 – 0.45 – 0.45 – 0.50 ns t DOH t CHQX Data Output Hold af ter Output C/C Clock Rise (Active to Active) –0.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 26 of 31 Switching W aveforms Figure 5. Read/Write/Deselect Sequence [2 8, 29, 30] K 1 2 34 5 6 7 RPS WP.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 27 of 31 Ordering Information The following table lists all possible speed, package, and temperat ure range options supported for these devi ces. Note that som e options listed may not be availabl e for order entry .
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 28 of 31 250 CY7C151 1KV18-250BZC 51-85180 165-Ball Fine Pi tch Ball Grid Array (13 x 15 x 1.4 mm) Commercial CY7C1526KV18-250BZC CY7C1513KV18-250BZC CY7C1515KV18-250BZC CY7C151 1 KV18-250BZXC 51-85180 165-Ball Fine Pitch Ball Grid Array (1 3 x 15 x 1.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 29 of 31 167 CY7C151 1KV18-167BZC 51-85180 165-Ball Fine Pi tch Ball Grid Array (13 x 15 x 1.4 mm) Commercial CY7C1526KV18-167BZC CY7C1513KV18-167BZC CY7C1515KV18-167BZC CY7C151 1 KV18-167BZXC 51-85180 165-Ball Fine Pitch Ball Grid Array (1 3 x 15 x 1.
CY7C151 1KV18, CY7C1526KV18 CY7C1513KV18, CY7C1515KV18 Document Number: 001-00435 Rev . *E Page 30 of 31 Package Diagram Figure 6. 165-Ball FBGA (13 x 15 x 1.4 mm), 51-85180 A 1 PIN 1 CORNER 15.00±0.10 13.00±0.10 7.00 1.00 Ø0.50 (165X) Ø 0 . 2 5MCAB Ø0.
Document Number: 001-00435 Rev . *E Revised March 30, 2009 Page 31 of 31 QDR RAMs an d Quad Data Rate RAMs comp rise a new family of product s developed by Cypress, I DT , NEC, Renesas, and Sa msung. All pr oduct and co mpany names mentioned i n this documen t are the tr ademark s of their re specti ve holders .
Un point important après l'achat de l'appareil (ou même avant l'achat) est de lire le manuel d'utilisation. Nous devons le faire pour quelques raisons simples:
Si vous n'avez pas encore acheté Cypress Semiconductor Perform CY7C1511KV18 c'est un bon moment pour vous familiariser avec les données de base sur le produit. Consulter d'abord les pages initiales du manuel d'utilisation, que vous trouverez ci-dessus. Vous devriez y trouver les données techniques les plus importants du Cypress Semiconductor Perform CY7C1511KV18 - de cette manière, vous pouvez vérifier si l'équipement répond à vos besoins. Explorant les pages suivantes du manuel d'utilisation Cypress Semiconductor Perform CY7C1511KV18, vous apprendrez toutes les caractéristiques du produit et des informations sur son fonctionnement. Les informations sur le Cypress Semiconductor Perform CY7C1511KV18 va certainement vous aider à prendre une décision concernant l'achat.
Dans une situation où vous avez déjà le Cypress Semiconductor Perform CY7C1511KV18, mais vous avez pas encore lu le manuel d'utilisation, vous devez le faire pour les raisons décrites ci-dessus,. Vous saurez alors si vous avez correctement utilisé les fonctions disponibles, et si vous avez commis des erreurs qui peuvent réduire la durée de vie du Cypress Semiconductor Perform CY7C1511KV18.
Cependant, l'un des rôles les plus importants pour l'utilisateur joués par les manuels d'utilisateur est d'aider à résoudre les problèmes concernant le Cypress Semiconductor Perform CY7C1511KV18. Presque toujours, vous y trouverez Troubleshooting, soit les pannes et les défaillances les plus fréquentes de l'apparei Cypress Semiconductor Perform CY7C1511KV18 ainsi que les instructions sur la façon de les résoudre. Même si vous ne parvenez pas à résoudre le problème, le manuel d‘utilisation va vous montrer le chemin d'une nouvelle procédure – le contact avec le centre de service à la clientèle ou le service le plus proche.
